The present invention relates generally to a system and method for exchanging messages among a plurality of computer boards connected via a bus on a common backplane.
Conventional backplane messaging schemes for exchanging messages among processors within a network utilizing a shared memory interconnect (bus) require a processor that wants to send a message (data packet) using the bus to request an empty buffer from the remote computer board processor, then transfer the data packet, and finally to notify the remote computer board processor of the arrival of the data packet. The overhead involved in this form of handshake for buffer allocation/de-allocation can significantly affect network performance.
A system and method of enhanced backplane messaging among a plurality of computer boards communicating over a common bus uses a set of pre-allocated buffers on each computer board to receive messages from other computer boards. Each sending computer board is represented on each remote computer board by a descriptor ring with pointers to pre-allocated buffers on that remote computer board. When a sending computer board has a message to deliver to a remote computer board, the sending computer board uses its DMA controller to transfer the message into the pre-allocated buffers on the remote computer board. The sending computer board also sends a mailbox interrupt to the remote computer board. The remote computer board interrupt handler searches its descriptor rings and manipulates a series of pointers to move messages from the descriptor rings to the intended receiving application(s). Pointer manipulation is also used to replenish the descriptor ring(s) with empty buffer(s). As a practical matter, pointer manipulation eliminates repeated copying of a message. Moreover, the use of pre-allocated buffers on each remote computer board achieves a significant performance boost over the more conventional technique of buffer request and assignment.
In addition, chained DMA transfers are used to eliminate any data transfers by a computer board processor (CPU) across the bus. The chained DMA transfers transfer messages to the pre-allocated buffers, set flags indicating that a message is present in a buffer, send a mailbox interrupt to the remote computer board, and read back the address of the next pre-allocated buffer for that descriptor ring.
Other aspects and features of the present invention will become apparent to those ordinarily skilled in the art upon review of the following description of specific embodiments of the invention in conjunction with the accompanying figures.